library verilog;
use verilog.vl_types.all;
entity cmsdk_mcu_clkctrl is
    generic(
        CLKGATE_PRESENT : integer := 0
    );
    port(
        XTAL1           : in     vl_logic;
        NRST            : in     vl_logic;
        APBACTIVE       : in     vl_logic;
        SLEEPING        : in     vl_logic;
        SLEEPDEEP       : in     vl_logic;
        SYSRESETREQ     : in     vl_logic;
        DBGRESETREQ     : in     vl_logic;
        LOCKUP          : in     vl_logic;
        LOCKUPRESET     : in     vl_logic;
        CGBYPASS        : in     vl_logic;
        RSTBYPASS       : in     vl_logic;
        XTAL2           : out    vl_logic;
        FCLK            : out    vl_logic;
        PCLK            : out    vl_logic;
        PCLKG           : out    vl_logic;
        PCLKEN          : out    vl_logic;
        PORESETn        : out    vl_logic;
        DBGRESETn       : out    vl_logic;
        HRESETn         : out    vl_logic;
        PRESETn         : out    vl_logic
    );
    attribute mti_svvh_generic_type : integer;
    attribute mti_svvh_generic_type of CLKGATE_PRESENT : constant is 1;
end cmsdk_mcu_clkctrl;
